mx98713 Macronix International Co., mx98713 Datasheet - Page 21

• Manufacturer Part Number: mx98713
• Description: 100/10base Pci Mac Controller
• Manufacturer: Macronix International Co.

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Field Name
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25:23 EB
22:20 TS
19:17 RS
16
15
13
11
9
8
7
6
5
3
2
1
0
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CSR5<25:23>
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000
001
010
011
1XX
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Table 2 -- Fatal Bus Error Bits
NIS
AIS
FBE
GTE
RWT
RPS
RU
RI
UNF
TJT
TU
TPS
TI
Description
Error Bits, read only bits indicating the type of error that induces fatal bus error.
Transmit Process State, read only bits indicating the state of transmit process.
Receive Process State, read only bits indicating the state of receive process.
Normal Interrupt Summary, is the logical OR of CSR5<0>, CSR5<2> and CSR5<6>.
Abnormal Interrupt Summary, to show the results of logical OR of CSR5<1>, CSR5<3>,
CSR5<5>, CSR5<7>, CSR5<8>, CSR5<9>, CSR5<11> and CSR5<13>.
Fatal Bus Error, indicating a system error occurred, PMAC will disable all bus access.
General Purpose Timer Expired, indicating CSR11 counter has expired.
Receive Watchdog Timeout, reflects the network line status where receive watchdog timer
has expired while the other node is still active on the network. If overflow also occurs, the
packet might not be received.
Write only, when written with any value, PMAC reads receive descriptor list in host memory
pointed by CSR4 and processes the list.
Receive Buffer Unavailable, the reception process is suspended because the next descriptor
in the receive list is owned by host. If no receive poll command is issued, the reception
process will resume when the next recognized incoming frame is received.
Receive Interrupt, indicating the completion of a frame reception.
Transmit Underflow, indicating transmit FIFO has run empty before the completion of a
packet transmission.
Transmit Jabber Timeout, indicating the PMAC has been excessively active. The transmit
process is aborted and placed in the stopped state. TDES0<1> is set also.
Transmit Buffer Unavailable, transmit process is suspended because the next descriptor in
the transmit list is owned by host.
Transmit Process Stopped.
Transmit Interrupt. indicating a frame transmission was completed.
Process State
parity error for either SERR# or PERR#, cleared by software reset.
master abort
target abort
reserved
reserved
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MX98713
INDEX