mx98713 Macronix International Co., mx98713 Datasheet - Page 31

• Manufacturer Part Number: mx98713
• Description: 100/10base Pci Mac Controller
• Manufacturer: Macronix International Co.

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Field Name
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8
5
4
2
1
0
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5.2.12. WATCHDOG TIMER ( CSR15)
MBZ
RWR
RWD
JCK
HUJ
JBD
Description
This bit should always be programmed to 0.
Defines the time interval of no carrier from receive watchdog expiration until reenabling the
receive channel. When set the receive watchdog is released 40-48 bit times from the last
carrier deassertion. When reset the receive watchdog is released 16 to 24 bit times from
the last carrier deassertion.
When set the receive watchdog counter is disable. When reset, receive carriers longer than
2560 bytes are guaranteed to cause the watchdog counter to time out. Packets shorter than
2048 bytes are guaranteed to pass.
When set transmission is cut off after a range of 2048 bytes to 2560 bytes is transmitted,
When reset transmission for the 10Mbps port is cut off after a range of 26 ms to 33ms. When
reset transmission for the 100Mbps port will be cut off after the period of 2.6ms to 3.3ms.
Defines the time interval between transmit jabber expiration until reenabling of the transmit
channel. When set the transmit channel is relased immediately after the jabber expiration.
When reset the jabber is released 365ms to 420ms after jabber expiration for 10Mbps port.
When reset the jabber is released 36.5ms to 42ms after the jabber expiration for 100Mbps
port.
Jabber Disable, set to disable transmit jabber function.
MBZ - Must Be Zero
RWR - Receive Watchdog Release
RWD - Receive Watchdog Disable
JCK - Jabber Clock
HUJ - Host Unjab
JAB - Jabber Disable
The register value after reset is "FFFFFEC8"h.
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MX98713
INDEX