mx98713 Macronix International Co., mx98713 Datasheet - Page 26

• Manufacturer Part Number: mx98713
• Description: 100/10base Pci Mac Controller
• Manufacturer: Macronix International Co.

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Field Name
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16
15
13
11
9
8
7
6
5
3
2
1
0
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5.2.7. INTERRUPT MASK REGISTER ( CSR7 )
NI
AI
FBE
GPT
RW
RS
RU
RI
UN
TJ
TU
TS
TI
NI- Normal Interrupt Summary Enable
AI-Abnormal Interrupt Summary Enable
FBE- Fatal Bus Error Enable
GPT- General-Purpose Timer Enable
RW- Receive Watchdog Enable
RS- Receive Stopped Enable
RU- Receive Buffer Unavailable Enable
RI- Receive Interrupt Enable
UN- Underflow Interrupt Enable
TJ- Transmit Jabber Timeout Enable
TU- Transmit Buffer Unavailable Enable
TS- Transmit Stopped Enable
TI- Transmit Interrupt Enable
Value after reset is "FFFE5410"h
Description
Normal Interrupt Summary Enable, set to enable CSR5<0>, CSR5<2>, CSR5<6>.
Abnormal Interrupt Summary enable, set to enable CSR5<1>, CSR5<3>, CSR5<5>,
CSR5<7>, CSR5<8>, CSR5<9>, CSR5<11> and CSR5<13>.
Fatal Bus Error Enable, set together with with CSR7<15> enables CSR5<13>.
General_-Purpose Timer Enable, set together with CSR7<15> enables CSR5<11>.
Receive Watchdog Timeout Enable, set together with CSR7<15> enables CSR5<9>.
Receive Stopped Enable, set together with CSR7<15> enables CSR5<8>.
Receive Buffer Unavailable Enable, set together with CSR7<15> enables CSR5<7>.
Receive Interrupt Enable, set together with CSR7<16> enables CSR5<6>.
Underflow Interrupt Enable, set together with CSR7<15> enables CSR5<5>.
Transmit Jabber Timeout Enable, set together with CSR7<15> enables CSR5<3>.
Transmit Buffer Unavailable Enable, set together with CSR7<16> enables CSR5<2>.
Transmit Stop Enable, set together with CSR7<15> enables CSR5<1>.
Transmit Interrupt Enable, set together with CSR7<16> enables CSR5<0>.
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MX98713
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