CY7C1480V33 Cypress Semiconductor, CY7C1480V33 Datasheet - Page 15

• Manufacturer Part Number: CY7C1480V33
• Description: (CY7C1480V33 / CY7C1482V33 / CY7C1486V33) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
• Manufacturer: Cypress Semiconductor

Document #: 38-05283 Rev. *C
3.3V TAP AC Test Conditions
Input pulse levels ............................................... .V
Input rise and fall times ................................................... 1 ns
Input timing reference levels ...........................................1.5V
Output reference levels...................................................1.5V
Test load termination supply voltage...............................1.5V
3.3V TAP AC Output Load Equivalent
TAP DC Electrical Characteristics And Operating Conditions
(0°C < T
Identification Register Definitions
V
V
V
V
V
V
I
Revision Number (31:29)
Device Depth (28:24)
Architecture/Memory Type(23:18)
Bus Width/Density(17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
Notes:
10. All voltages referenced to V
11. Bit #24 is “1” in the ID Register Definitions for both 2.5V and 3.3V versions of this device.
X
OH1
OH2
OL1
OL2
IH
IL
Parameter
TDO
A
Instruction Field
< +70°C; V
Z = 50Ω
Output HIGH Voltage I
Output HIGH Voltage I
Output LOW Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
O
DD
= 3.135 to 3.6V unless otherwise noted)
SS
Description
(GND).
CY7C1480V33
1.5V
00000110100
(2M x36)
000000
100100
01011
000
20pF
50Ω
1
I
I
I
I
GND < V
OH
OH
OH
OL
OL
OL
= 8.0 mA
= 1.0 mA
= 100 µA
= –4.0 mA, V
= –1.0 mA, V
= –100 µA
SS
PRELIMINARY
CY7C1482V33
IN
00000110100
to 3.3V
(4M x 18)
< V
000000
010100
01011
000
Test Conditions
DDQ
1
DDQ
DDQ
[10]
= 3.3V
= 2.5V
2.5V TAP AC Test Conditions
Input pulse levels................................................. V
Input rise and fall time .....................................................1 ns
Input timing reference levels......................................... 1.25V
Output reference levels ................................................ 1.25V
Test load termination supply voltage ............................ 1.25V
2.5V TAP AC Output Load Equivalent
CY7C1486V33
V
V
V
V
V
V
V
V
V
V
00000110100 Allows unique identification of SRAM
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
(1M x72)
000000
110100
01011
TDO
000
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
1
Describes the version number
Reserved for internal use
Defines memory type and architecture
Defines width and density
vendor
Indicates the presence of an ID register
Z = 50Ω
O
Min.
–0.3
–0.3
2.4
2.0
2.9
2.1
2.0
1.7
–5
Description
CY7C1482V33
CY7C1486V33
CY7C1480V33
1.25V
V
V
DD
DD
Max.
0.4
0.4
0.2
0.2
0.8
0.7
5
+ 0.3
+ 0.3
20pF
50Ω
Page 15 of 30
SS
to 2.5V
Unit
µA
V
V
V
V
V
V
V
V
V
V
V
V