MC68HC705C Motorola, MC68HC705C Datasheet - Page 114

• Manufacturer Part Number: MC68HC705C
• Description: HCMOS Microcontroller Unit
• Manufacturer: Motorola

EPROM/OTPROM (PROM)
9.5 Control Registers
9.5.1 Option Register
Technical Data
114
Address:
This subsection describes the three registers that control memory
configuration, PROM security, and IRQ edge or level sensitivity; port B
pullups; and non-programmable COP enable/disable.
The option register shown in
sensitivity, enable the PROM security, and select the memory
configuration.
RAM0 — Random-Access Memory Control Bit 0
RAM1 — Random-Access Memory Control Bit 1
Reset:
Read:
Write:
1 = Maps 32 bytes of RAM into page zero starting at address
0 = Provides 48 bytes of PROM at location $0020–$005F.
1 = Maps 96 bytes of RAM into page one starting at address $0100.
0 = Provides 96 bytes of PROM at location $0100.
*
Implemented as an EPROM cell
$1FDF
RAM0
Bit 7
$0030. Addresses from $0020 to $002F are reserved. This bit
can be read or written at any time, allowing memory
configuration to be changed during program execution.
This bit can be read or written at any time, allowing memory
configuration to be changed during program execution.
0
EPROM/OTPROM (PROM)
= Unimplemented
Figure 9-4. Option Register (Option)
RAM1
6
0
5
0
0
Figure 9-4
4
0
0
U = Unaffected
is used to select the IRQ
SEC
3
*
*
MC68HC705C8A — Rev. 2.0
U
2
IRQ
1
1
MOTOROLA
Bit 0
0
0