MC68HC705C Motorola, MC68HC705C Datasheet - Page 48
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MC68HC705C
Manufacturer Part Number
MC68HC705C
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet
1.MC68HC705C.pdf
(222 pages)
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Interrupts
4.3 Interrupt Sources
4.3.1 Software Interrupt
Technical Data
48
These sources can generate interrupts:
The IRQ pin, port B pins, SCI, and SPI can be masked (disabled) by
setting the I bit of the condition code register (CCR). The software
interrupt (SWI) instruction is non-maskable.
An interrupt temporarily changes the program sequence to process a
particular event. An interrupt does not stop the execution of the
instruction in progress but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the
central processor unit (CPU) registers on the stack and loads the
program counter with a user-defined vector address.
The software interrupt instruction (SWI) causes a non-maskable
interrupt.
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•
•
•
•
Software instructions (SWI)
External interrupt pin (IRQ)
Port B pins
Serial communications interface (SCI):
– SCI transmit data register empty
– SCI transmission complete
– SCI receive data register full
– SCI receiver overrun
– SCI receiver input idle
Serial peripheral interface (SPI):
– SPI transmission complete
– SPI mode fault
– SPI overrun
Interrupts
MC68HC705C8A — Rev. 2.0
MOTOROLA