MC68HC705C Motorola, MC68HC705C Datasheet - Page 90

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MC68HC705C

Manufacturer Part Number
MC68HC705C
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet

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Capture/Compare Timer
8.3.1 Input Capture
Technical Data
90
TCAP
SELECT/DETECT
LOGIC
EDGE
Because of the 16-bit timer architecture, the I/O registers for the input
capture and output compare functions are pairs of 8-bit registers.
Because the counter is 16 bits long and preceded by a fixed
divide-by-four prescaler, the counter rolls over every 262,144 internal
clock cycles. Timer resolution with a 4-MHz crystal is 2 s.
The input capture function can record the time at which an external event
occurs. When the input capture circuitry detects an active edge on the
input capture pin (TCAP), it latches the contents of the timer registers
into the input capture registers. The polarity of the active edge is
programmable.
Latching values into the input capture registers at successive edges of
the same polarity measures the period of the input signal on the TCAP
pin. Latching the counter values at successive edges of opposite polarity
measures the pulse width of the signal.
input capture function.
Figure 8-3. Input Capture Operation
LATCH
TIMER CONTROL REGISTER
Capture/Compare Timer
15
15
INPUT CAPTURE REGISTER HIGH
$0012
TIMER REGISTER HIGH
$0018
$0014
8
8
Figure 8-3
TIMER STATUS REGISTER
7
7
INPUT CAPTURE REGISTER LOW
TIMER REGISTER LOW
$0013
MC68HC705C8A — Rev. 2.0
$0019
$0015
shows the logic of the
INTERRUPT
REQUEST
TIMER
MOTOROLA
0
0

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