MC68HC705C Motorola, MC68HC705C Datasheet - Page 131
MC68HC705C
Manufacturer Part Number
MC68HC705C
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet
1.MC68HC705C.pdf
(222 pages)
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10.6.4 SCI Status Register
MC68HC705C8A — Rev. 2.0
MOTOROLA
Address:
SBK — Send Break Bit
The SCI status register (SCSR) shown in
signal these conditions:
Reset:
Read:
Write:
idle input or an address mark brings the receiver out of the standby
state. Reset clears the RWU bit.
Setting this read/write bit continuously transmits break codes in the
form of 10-bit or 11-bit groups of logic 0s. Clearing the SBK bit stops
the break codes and transmits a logic 1 as a start bit. Reset clears the
SBK bit.
•
•
•
•
•
•
•
1 = Standby state
0 = Normal operation
1 = Break codes being transmitted
0 = No break codes being transmitted
Transfer of SCDR data to transmit shift register complete
Transmission complete
Transfer of receive shift register data to SCDR complete
Receiver input idle
Receiver overrun
Noisy data
Framing error
Serial Communications Interface (SCI)
$0010
TDRE
Bit 7
1
Figure 10-8. SCI Status Register (SCSR)
= Unimplemented
TC
6
1
RDRF
5
0
IDLE
4
0
Serial Communications Interface (SCI)
U = Unaffected
OR
Figure 10-8
3
0
NF
2
0
contains flags to
SCI I/O Registers
FE
1
0
Technical Data
Bit 0
U
131