MC68HC705C Motorola, MC68HC705C Datasheet - Page 94

• Manufacturer Part Number: MC68HC705C
• Description: HCMOS Microcontroller Unit
• Manufacturer: Motorola

Capture/Compare Timer
8.4.2 Timer Status Register
Technical Data
94
Address:
The timer status register (TSR) is a read-only register shown in
Figure 8-6
ICF — Input Capture Flag
OCF — Output Compare Flag
Reset:
Read:
Write:
•
•
•
The ICF bit is set automatically when an edge of the selected polarity
occurs on the TCAP pin. Clear the ICF bit by reading the timer status
register with ICF set and then reading the low byte ($0015) of the
input capture registers. Reset has no effect on ICF.
The OCF bit is set automatically when the value of the timer registers
matches the contents of the output compare registers. Clear the OCF
bit by reading the timer status register with OCF set and then reading
the low byte ($0017) of the output compare registers. Reset has no
effect on OCF.
1 = Input capture
0 = No input capture
1 = Output compare
0 = No output compare
An active signal on the TCAP pin, transferring the contents of the
timer registers to the input capture registers
A match between the 16-bit counter and the output compare
registers, transferring the OLVL bit to the TCMP pin
A timer rollover from $FFFF to $0000
$0013
Bit 7
ICF
U
contains flags for these events:
Figure 8-6. Timer Status Register (TSR)
Capture/Compare Timer
= Unimplemented
OCF
U
6
TOF
U
5
U = Unaffected
4
0
0
3
0
0
MC68HC705C8A — Rev. 2.0
2
0
0
1
0
0
MOTOROLA
Bit 0
0
0