MC68HC705C Motorola, MC68HC705C Datasheet - Page 44
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MC68HC705C
Manufacturer Part Number
MC68HC705C
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet
1.MC68HC705C.pdf
(222 pages)
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Central Processor Unit (CPU)
3.3.3 Stack Pointer
3.3.4 Program Counter
Technical Data
44
Reset:
Read:
Write:
Reset:
Read:
Write:
Bit 12
Bit 12
0
0
The stack pointer (SP) shown in
contains the address of the next free location on the stack. During a
reset or after the reset stack pointer (RSP) instruction, the stack pointer
initializes to $00FF. The address in the stack pointer decrements as data
is pushed onto the stack and increments as data is pulled from the stack.
The seven most significant bits of the stack pointer are fixed
permanently at 0000011, so the stack pointer produces addresses from
$00C0 to $00FF. If subroutines and interrupts use more than 64 stack
locations, the stack pointer wraps around to address $00FF and begins
writing over the previously stored data. A subroutine uses two stack
locations. An interrupt uses five locations.
The program counter (PC) shown in
contains the address of the next instruction or operand to be fetched.
Normally, the address in the program counter automatically increments
to the next sequential memory location every time an instruction or
operand is fetched. Jump, branch, and interrupt operations load the
program counter with an address other than that of the next sequential
location.
= Unimplemented
11
11
0
0
10
10
0
0
Central Processor Unit (CPU)
Figure 3-5. Program Counter (PC)
9
9
0
0
Loaded with reset vector from $1FFE and $1FFF
Figure 3-4. Stack Pointer (SP)
8
0
0
8
7
1
1
7
Figure 3-4
1
6
6
1
Figure 3-5
5
1
5
is a 13-bit register that
4
1
4
MC68HC705C8A — Rev. 2.0
is a 13-bit register that
3
1
3
2
1
2
MOTOROLA
1
1
1
Bit 0
Bit 0
1