MC68HC705C Motorola, MC68HC705C Datasheet - Page 144

• Manufacturer Part Number: MC68HC705C
• Description: HCMOS Microcontroller Unit
• Manufacturer: Motorola

Serial Peripheral Interface (SPI)
11.6 Serial Clock Polarity and Phase
Technical Data
144
CPHA
0
1
0
1
CPOL
0
0
1
1
CAPTURE STROBE
SDO/SDI
SCK (C)
SCK (D)
SCK (A)
SCK (B)
SS
To accommodate the different serial communication requirements of
peripheral devices, software can change the phase and polarity of the
SPI serial clock. The clock polarity bit (CPOL) and the clock phase bit
(CPHA), both in the SPCR, control the timing relationship between the
serial clock and the transmitted data.
and CPHA bits affect the clock/data timing.
Figure 11-5. Two Master/Slaves and Three Slaves Block Diagram
MSB
MASTER/SLAVE
Figure 11-6. SPI Clock/Data Timing
MCU 1
PD2/MISO
PD3/MOSI
PORT
PD4/SCK
I/O
PD5/SS
BIT 6
Serial Peripheral Interface (SPI)
0
1
2
3
BIT 5
SLAVE MCU 2
BIT 4
SLAVE MCU 1
BIT 3
Figure 11-6
BIT 2
SLAVE MCU 0
MC68HC705C8A — Rev. 2.0
BIT 1
shows how the CPOL
LSB
MASTER/SLAVE
PD2/MISO
PD3/MOSI
PD4/SCK
PD5/SS
0
1
2
3
MCU 2
PORT
MOTOROLA
I/O