CY7C1355C-100AC CYPRESS [Cypress Semiconductor], CY7C1355C-100AC Datasheet - Page 19

• Manufacturer Part Number: CY7C1355C-100AC
• Description: 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05539 Rev. **
119-ball BGA Boundary Scan Order
CY7C1355C (256K x 36)
BIT
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
#
1
2
3
4
5
6
7
8
9
BALL
M6
H4
R5
R6
U6
R7
N7
N6
H6
G7
D7
H7
G6
D6
C7
C6
C5
G5
T4
T5
T6
L5
T7
P6
L7
K6
P7
L6
K7
F6
E7
E6
B7
A6
B5
ID
J5
BIT
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
#
BALL
M4
M2
B6
D4
B4
A5
K4
E4
G4
A4
G3
C3
B2
B3
A3
C2
A2
B1
C1
D2
E1
G1
H2
D1
E2
G2
H1
2K
N1
P1
K1
F4
F2
L1
L2
ID
J3
[13, 14]
CY7C1355C (256K x 36)
Note:
PRELIMINARY
13. Balls which are NC (No Connect) are Pre-Set LOW
14. Bit# 85 is Pre-Set HIGH
BIT#
73
74
75
76
77
78
79
80
81
82
83
84
85
BALL ID
Internal
N2
P2
R3
R1
R2
N4
P4
T1
T2
L3
T3
L4
CY7C1355C
CY7C1357C
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