DSP56156FV40 MOTOROLA [Motorola, Inc], DSP56156FV40 Datasheet - Page 37

• Manufacturer Part Number: DSP56156FV40
• Description: 16-bit Digital Signal Processor
• Manufacturer: MOTOROLA [Motorola, Inc]

Bus Arbitration Timing — Master Mode
(V
MOTOROLA
Num
CC
85
86
87
88
89
90
(Output)
(Output)
= 5.0 V dc ± 10%, T
A0-A15
PS/DS
(Input)
CLKO
(I/O)
R/W
BG
BR
BB
CLKO High to BR Output Assertion
CLKO High to BR Output Deassertion
BG Input Asserted/ Deasserted to CLKO
Low (Setup)
CLKO Low to BG Input Invalid (Hold)
CLKO Low to BB Input Deasserted (Hold)
CLKO High to BB Output Asserted
BB Input Deasserted to CLKO Low (Setup)
Figure 22 Bus Arbitration Timing — Master Mode — Bus Acquisition
85
Characteristic
Freescale Semiconductor, Inc.
For More Information On This Product,
J
= -40 to +125 C, C
Go to: www.freescale.com
Table 18 Master Mode
DSP56156 Data Sheet
88
86
89
L
= 50 pF + 1 TTL Load)
Min
4.7
9.2
9.2
4.7
0
0
40 MHz
82
81
Max
12
—
—
—
—
12
87
Three-state
Min
4.7
6.5
6.5
4.7
0
0
50 MHz
AC Electrical Characteristics and Timing
Bus Arbitration Timing — Master Mode
Max
12
—
—
—
—
12
Min
4.7
4.5
4.5
4.7
90
0
0
60 MHz
Max
12
—
—
—
—
12
Unit
ns
ns
ns
ns
ns
ns
37