DSP56156FV40 MOTOROLA [Motorola, Inc], DSP56156FV40 Datasheet - Page 72

• Manufacturer Part Number: DSP56156FV40
• Description: 16-bit Digital Signal Processor
• Manufacturer: MOTOROLA [Motorola, Inc]

Freescale Semiconductor, Inc.
Design Considerations
Analog I/O Considerations
A four level board is recommended. The top layer (directly under the parts) and the bottom
layer should be interconnect layers. The two center layers should be power and ground.
Ground and power planes should be completely separated. The digital and analog power/
ground planes should not overlap. All codec pins should be over the analog planes. The ana-
log planes should not encompass any digital pins. All codec signal traces should be over the
analog planes.
Figure 47 shows that 0.1 F bypass caps should be located as close to the pins being bypassed
as possible. The ground side of these caps should be connected as close as possible to the V
CCA
pin. The ground side of the bypass cap should be connected to the V
pin by short traces.
CCA
BIAS
AUX
MIC
28
10 k
0.1 F
0.1 F
65 F
Š10 µF
25 F
Figure 47 Suggested Top Layer Bypassing
The pins with 0.1 F bypass caps are VREF and GNDA. The largest size practical bypass
caps should also be added for each of these pins as well as for the VDIV pin; 10 F bypass
caps should be considered a minimum value for the larger caps (65 F on VDIV may be
used). These caps should be near the package but do not have to be right next to the pins.
The DAC outputs (SPKP and SPKM) should be run right next to each other as shown on Figure 48.
DSP56156 Data Sheet
67
MOTOROLA
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