ADAU1373BCBZ-RL AD [Analog Devices], ADAU1373BCBZ-RL Datasheet - Page 153

• Manufacturer Part Number: ADAU1373BCBZ-RL
• Description: Low Power Codec with Speaker and Headphone Amplifier
• Manufacturer: AD [Analog Devices]

DAIA REGISTER
Address: 0x44, Reset: 0x0A, Name: DAIA
Digital Audio Interface A Settings 1
Table 97. Bit Descriptions for DAIA
Bits
7
6
5
4
[3:2]
[1:0]
Bit Name
BCLKINVA
MSA
SWAPA
LRPA
WLA
FORMATA
Settings
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
Description
BCLK Inversion Control. Bit clock polarity inversion setting.
BCLK not inverted (default)
BCLK inverted
Master Mode Enable. Digital Audio Interface A master/slave setting.
Enable slave mode (default)
Enable master mode
Swap Audio Interface Data Control. Left/right channel data swap setting.
Output left- and right-channel data as normal (default)
Swap left- and right-channel DAC data in audio interface
Polarity Control for Clocks in Right-Justified, Left-Justified, and I
Polarity invert setting for frame clock.
Normal DACLRC and ADCLRC (default)
Invert DACLRC and ADCLRC polarity
Data-Word Length Control. Digital Audio Interface A data-word length
setting: 16/20/24/32 bits.
16 bits
20 bits
24 bits (default)
32 bits
Digital Audio Interface A Format Control. Digital Audio Interface A serial
format setting RJ/LJ/I2S/DSP mode.
Right justified
Left justified
I
DSP mode
2
S format (default)
Rev. 0 | Page 153 of 296
2
S Modes.
Reset
0x0
0x0
0x0
0x0
0x2
0x2
ADAU1373
Access
RW
RW
RW
RW
RW
RW