ADAU1373BCBZ-RL AD [Analog Devices], ADAU1373BCBZ-RL Datasheet - Page 161

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ADAU1373BCBZ-RL

Manufacturer Part Number
ADAU1373BCBZ-RL
Description
Low Power Codec with Speaker and Headphone Amplifier
Manufacturer
AD [Analog Devices]
Datasheet
SRCC_RATIOA REGISTER
Address: 0x4E, Reset: 0x00, Name: SRCC_RATIOA
Sample Rate Converter C Setting
Table 107. Bit Descriptions for SRCC_RATIOA
Bits
7
[6:4]
[3:0]
SRCC_RATIOB REGISTER
Address: 0x4F, Reset: 0x00, Name: SRCC_RATIOB
Sample Rate Converter C Setting
Table 108. Bit Descriptions for SRCC_RATIOB
Bits
[7:0]
Bit Name
SRCCMODE
SRCCINT
SRCCRFRE_HI
Bit Name
SRCCRFRE_LOW
Settings
Settings
0
1
Description
SRCC Working Mode. SRCC ratio can be set to autodetect or manual
mode. In manual mode, the SRCC ratio needs to be set using SRCCINT,
SRCCRFRE_HI, and SRCCRFRE_LOW bits. The format is 3.12.
Enable ASRCC ratio autodetect; the data is automatically written in the
SRCC INT/FRAC ratio register (default)
Disable ASRCC ratio autodetect, using the data set in the SRCC INT/FRAC
ratio register
Integer Part of the SRCC Ratio Setting.
Upper Four Bits for the SRCC Ratio Setting.
Description
Lower Byte for the SRCC Ratio Setting.
Rev. 0 | Page 161 of 296
Reset
0x0
0x0
0x0
Reset
0x00
ADAU1373
Access
RW
RW
RW
Access
RW

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