ADAU1373BCBZ-RL AD [Analog Devices], ADAU1373BCBZ-RL Datasheet - Page 64

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ADAU1373BCBZ-RL

Manufacturer Part Number
ADAU1373BCBZ-RL
Description
Low Power Codec with Speaker and Headphone Amplifier
Manufacturer
AD [Analog Devices]
Datasheet
ADAU1373
Worked Examples
The following examples illustrate how to calculate the coefficients
for the desired peak and low-pass/high-pass shelving filter.
Low-Pass Shelving Filter
If Band 6 is intended to operate as a low-pass shelving filter and
the cutoff frequency of the filter is 80 Hz, peak gain is 6 dB, and
input signal sampling frequency is 48 kHz, the coefficients are
as follows:
1.
2.
3.
p2 = 0
d1 = α = 0.989582475318754
d2 = 0
Transfer the coefficients to integer numbers:
p0 = round(1.005184084865251 × 8192) = 8234
p1 = round(−0.984398390453503 × 8192) = −8064
p2 = 0
d1 = round(0.989582475318754 × 8192) = 8107
d2 = 0
Represent the integer coefficients by 16-bit, twos
complement hexadecimal values:
p0 = 16-bit 0x202A
p1 = 16-bit 0xE080
p2 = 16-bit 0x0000
d1 = 16-bit 0x1FAB
d2 = 16-bit 0x0000
Therefore, the registers representing EQ1 coefficients
should be set as follows:
EQ6 COEF0M = 8’0x20, EQ6 COEF0L = 8’0x2A;
EQ6 COEF1M = 8’0xE0, EQ6 COEF1L = 8’0x80;
EQ6 COEF2M = 8’0x1F, EQ6 COEF2L = 8’0xAB
α
k
p0
p1
=
=
=
10
=
1 (
1 (
(
(
20
k
cos(
6
+
)
sin(
= 1.995262314968880
k
) 1
48000
)
48000
+
80
80
1 (
2
1 (
2
+
×
k
×
k
2
)
π
)
2
×
×
π
)
α
α
))
= 0.989582475318754
= 1.005184084865251
= −0.984398390453503
Rev. 0 | Page 64 of 296
Peak Filter
If Band 1 is intended to operate as a peak filter with a filter center
frequency of 240 Hz, the bandwidth is 120 Hz, peak gain is 6 dB,
and the input signal sampling frequency is 48KHz, then the
coefficients are as follows:
1.
2.
3.
p1 = −(1 + α) × β = −1.983434938834828
p2 =
d1 = (1 + α) × β = 1.983434938834828
d2 = − α = −0.984414127416097
Transfer the coefficients to integer numbers:
p0 = round(1.007756015814333 × 8192) = 8256
p1 = round(−1.983434938834828 × 8192) = −16248
p2 = round(0.976658111601764 × 8192) = 8000
d1 = round(1.983434938834828 × 8192) = 16248
d2 = round(−0.984414127416097 × 8192) = −8064
Represent the integer coefficients by 16-bit, twos
complement hexadecimal values:
p0 = 16-bit 0x2040
p1 = 16-bit 0x1F40
p2 = 16-bit 0x1F41
d1 = 16-bit 0x3F78
d2 = 16-bit 0xE080
Therefore, the registers representing EQ1 coefficients
should be set as follows:
EQ1 COEF0M = 8’0x20, EQ1 COEF0L = 8’0x40;
EQ1 COEF1M = 8’0x1F, EQ1 COEF1L = 8’0x40;
EQ1 COEF2M = 8’0x1F, EQ1 COEF2L = 8’0x41;
EQ1 COEF3M = 8’0x3F, EQ1 COEF3L = 8’0x78;
EQ1 COEF4M = 8’0xE0, EQ1 COEF4L = 8’0x80
k
α
β
p0
=
=
=
10
=
1 (
cos(
1 (
1 (
(
20
6
cos(
+
)
sin(
48000
= 1.995262314968880
k
240
k
)
4800
)
120
+
48000
+
120
1 (
2
1 (
2
×
+
×
2
π
k
2
×
k
)
π
)
)
2
×
)
= 0.999506560365732
π
×
α
))
α
= 0.976658111601764
= 0.984414127416097
= 1.007756015814333

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