ADAU1373BCBZ-RL AD [Analog Devices], ADAU1373BCBZ-RL Datasheet - Page 60

• Manufacturer Part Number: ADAU1373BCBZ-RL
• Description: Low Power Codec with Speaker and Headphone Amplifier
• Manufacturer: AD [Analog Devices]

ADAU1373
Table 21. Interrupt Request Register and Bit Controls
Register
Address
0x8F, 0x9F, 0xAF
0x8F, 0x9F, 0xAF
0x8E, 0x9E, 0xAE
0x8E, 0x9E, 0xAE
–0.5
–1.0
–0.1
–0.2
–14
–16
–18
–20
–22
1.0
0.5
0.2
0.1
0
0
Figure 109. Limiter Dynamic—Working Example Showing Hold Time
–0.5
–1.0
–0.1
–0.2
–14
–15
–16
–17
–18
–19
–20
–21
0
1.0
0.5
0.2
0.1
0
0
0
Figure 108. Limiter Dynamic Behavior—Working Example
LIMITER TARGET LEVEL
RELEASE (DECAY) TIME
LIMITER THRESHOLD
(DRCTHX1)
1000
(NO HOLD TIME)
1000
(DRCTHY1)
(DRCTHY1)
2000
2000
Bits
1
0
[6:2]
[1:0]
3000
DRC GAIN (dB)
3000
HOLD TIME DURING
RECOVERY
(DRCHTNOR)
OUTPUT
DRC GAIN (dB)
INPUT
Bit Name
DRCIRQ_MODE
DRCIRQ_EN
SIG_DET_RMS
SIG_DET_PK
4000
OUTPUT
INPUT
4000
5000
5000
6000
6000
ATTACK TIME
(DRCLELATT)
Function
DRC interrupt mode. 0: selects the input signal rms value as the interrupt source; 1: selects the
ratio between the peak and rms signal of the input signal.
DRC interrupt enable.
RMS detector level. Defines the rms value above which the IRQ circuits send out the
interruption signal when the DRCIRQ_MODE bit = 0. Available range: −76.5 dB to −30 dB.
Peak to rms detector ratio. Defines the peak to rms value above which the IRQ circuits send
out the interruption signal when the DRCIRQ_MODE bit = 1. Available range: 12 dB to 30 dB.
7000
7000
8000
8000
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Working Example
If the required LPF cutoff frequency is 20 kHz, the HPF cutoff
frequency is 350 Hz, low band crossover frequency is 1 kHz, and
high band crossover frequency is 8 kHz, as shown in Figure 111.
The DRC can generate an interrupt request when enabled. See
Table 21 for a listing of the interrupt request register and bit
controls.
•
•
•
H(f)
NOISE GATE
TIME FOR
To configure MDRC HPF and LPF, set Register 0xB0 to 0x1A.
To configure MDRC crossover frequencies, set Register 0xB1
to 0x79.
To enable MDRC HPF and LPF, set Register 0xB2 to 0x07.
–10
–20
–30
–0.5
–1.0
1.0
0.5
–1
–2
10
2
1
0
0
0
HOLD
x10
x10
0
0
0
Figure 110. Noise Gate Dynamic—Working Example
–4
–4
350
1000
1000
1000
BAND
NOISE GATE
THRESHOLD
ATTACK
LOW
(DRCTHX4)
TIME
Figure 111. MDRC Example
2000
2000
1000
2000
DRC GAIN (dB)
BAND
OUTPUT
MID
INPUT
3000
3000
3000
8000
NOISE GATE RECOVERY
(DECAY) TIME
4000
4000
4000
BAND
HIGH
20000
5000
5000
5000
f
IN
6000
6000
6000
(Hz)