PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 156

• Manufacturer Part Number: PIC18F23K20-E/MLQTP
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2XK20/4XK20
15.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
15.1.1
The CCP modules utilize Timers 1, 2 or 3, depending
on the mode selected. Timer1 and Timer3 are available
to modules in Capture or Compare modes, while
Timer2 is available for modules in PWM mode.
TABLE 15-1:
TABLE 15-2:
DS41303B-page 154
CCP1 Mode CCP2 Mode
Note 1:
Compare
Compare
Compare
Capture
Capture
Capture
PWM
PWM
PWM
CCP/ECCP Mode
Compare
Capture
(1)
(1)
(1)
CCP Module Configuration
PWM
Includes standard and enhanced PWM operation.
CCP MODULES AND TIMER
RESOURCES
Compare
Compare
Compare
Capture
Capture
Capture
CCP MODE – TIMER
INTERACTIONS BETWEEN CCP1 AND CCP2 FOR TIMER RESOURCES
RESOURCE
PWM
PWM
PWM
for each CCP.
CCP2 can be configured for the Special Event Trigger to reset TMR1 or TMR3
(depending upon which time base is used). Automatic A/D conversions on trigger event
can also be done. Operation of CCP1 could be affected if it is using the same timer as a
time base.
CCP1 can be configured for the Special Event Trigger to reset TMR1 or TMR3
(depending upon which time base is used). Operation of CCP2 could be affected if it is
using the same timer as a time base.
Either module can be configured for the Special Event Trigger to reset the time base.
Automatic A/D conversions on CCP2 trigger event can be done. Conflicts may occur if
both modules are using the same time base.
None
None
None
None
Each module can use TMR1 or TMR3 as the time base. The time base can be different
Both PWMs will have the same frequency and update rate (TMR2 interrupt).
Timer1 or Timer3
Timer1 or Timer3
Timer Resource
Timer2
Advance Information
The assignment of a particular timer to a module is
determined by the Timer-to-CCP enable bits in the
T3CON register (Register 14-1). Both modules can be
active at the same time and can share the same timer
resource if they are configured to operate in the same
mode (Capture/Compare or PWM). The interactions
between the two modules are summarized in Figure 15-1
and Figure 15-2. In Asynchronous Counter mode, the
capture operation will not work reliably.
15.1.2
The pin assignment for CCP2 (Capture input, Compare
and PWM output) can change, based on device config-
uration. The CCP2MX Configuration bit determines the
pin with which CCP2 is multiplexed. By default, it is
assigned to RC1 (CCP2MX = 1). If the Configuration bit
is cleared, CCP2 is multiplexed with RB3.
Changing the pin assignment of CCP2 does not
automatically change any requirements for configuring
the port pin. Users must always verify that the
appropriate TRIS register is configured correctly for
CCP2 operation, regardless of where it is located.
Interaction
CCP2 PIN ASSIGNMENT
© 2007 Microchip Technology Inc.