PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 54

• Manufacturer Part Number: PIC18F23K20-E/MLQTP
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2XK20/4XK20
4.4
PIC18F2XK20/4XK20 devices implement a BOR circuit
that provides the user with a number of configuration
and power-saving options. The BOR is controlled by
the BORV<1:0> and BOREN<1:0> bits of the
CONFIG2L Configuration register. There are a total of
four BOR configurations which are summarized in
Table 4-1.
The BOR threshold is set by the BORV<1:0> bits. If
BOR is enabled (any values of BOREN<1:0>, except
‘00’), any drop of V
for greater than T
device. A Reset may or may not occur if V
V
Brown-out Reset until V
If the Power-up Timer is enabled, it will be invoked after
V
Reset
(parameter 33). If V
Power-up Timer is running, the chip will go back into a
Brown-out Reset and the Power-up Timer will be
initialized. Once V
Timer will execute the additional time delay.
BOR
independently configured. Enabling BOR Reset does
not automatically enable the PWRT.
4.4.1
When BOREN<1:0> = 01, the BOR can be enabled or
disabled by the user in software. This is done with the
SBOREN control bit of the RCON register. Setting
SBOREN enables the BOR to function as previously
described. Clearing SBOREN disables the BOR
entirely. The SBOREN bit operates only in this mode;
otherwise it is read as ‘0’.
TABLE 4-1:
DS41303B-page 52
BOR
DD
BOREN1
BOR Configuration
rises above V
0
0
1
1
for less than T
and
for
Brown-out Reset (BOR)
SOFTWARE ENABLED BOR
an
the
BOREN0
BOR CONFIGURATIONS
DD
additional
BOR
BOR
Power-on
0
1
0
1
DD
DD
rises above V
BOR
below V
; it then will keep the chip in
DD
(parameter 35) will reset the
drops below V
. The chip will remain in
rises above V
(RCON<6>)
Unavailable
Unavailable
Unavailable
SBOREN
Available
Status of
time
BOR
Timer
BOR
(parameter D005)
delay,
, the Power-up
BOR
(PWRT)
BOR
DD
BOR disabled; must be enabled by reprogramming the Configuration bits.
BOR enabled by software; operation controlled by SBOREN.
BOR enabled by hardware in Run and Idle modes, disabled during
Sleep mode.
BOR enabled by hardware; must be disabled by reprogramming the
Configuration bits.
falls below
Advance Information
.
while the
T
PWRT
are
Placing the BOR under software control gives the user
the additional flexibility of tailoring the application to its
environment without having to reprogram the device to
change BOR configuration. It also allows the user to
tailor device power consumption in software by
eliminating the incremental current that the BOR
consumes. While the BOR current is typically very small,
it may have some impact in low-power applications.
4.4.2
When BOR is enabled, the BOR bit always resets to ‘0’
on any BOR or POR event. This makes it difficult to
determine if a BOR event has occurred just by reading
the state of BOR alone. A more reliable method is to
simultaneously check the state of both POR and BOR.
This assumes that the POR and BOR bits are reset to
‘1’ by software immediately after any POR event. If
BOR is ‘0’ while POR is ‘1’, it can be reliably assumed
that a BOR event has occurred.
4.4.3
When BOREN<1:0> = 10, the BOR remains under
hardware
described. Whenever the device enters Sleep mode,
however, the BOR is automatically disabled. When the
device returns to any other operating mode, BOR is
automatically re-enabled.
This mode allows for applications to recover from
brown-out situations, while actively executing code,
when the device requires BOR protection the most. At
the same time, it saves additional power in Sleep mode
by eliminating the small incremental BOR current.
Note:
BOR Operation
Even when BOR is under software control,
the BOR Reset voltage level is still set by
the BORV<1:0> Configuration bits. It can-
not be changed by software.
DETECTING BOR
DISABLING BOR IN SLEEP MODE
control
and
© 2007 Microchip Technology Inc.
operates
as
previously