PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 285

• Manufacturer Part Number: PIC18F23K20-E/MLQTP
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

22.0
PIC18F2XK20/4XK20 devices have a High/Low-Voltage
Detect module (HLVD). This is a programmable circuit
that allows the user to specify both a device voltage trip
point and the direction of change from that point. If the
device experiences an excursion past the trip point in
that direction, an interrupt flag is set. If the interrupt is
enabled, the program execution will branch to the inter-
rupt vector address and the software can then respond
to the interrupt.
The
(Register 22-1) completely controls the operation of the
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
REGISTER 22-1:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
VDIRMAG
R/W-0
High/Low-Voltage
HIGH/LOW-VOLTAGE
DETECT (HLVD)
See Table 26-3 for specifications.
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL<3:0>)
0 = Event occurs when voltage equals or falls below trip point (HLVDL<3:0>)
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage range
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL<3:0>: Voltage Detection Limit bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
range and the HLVD interrupt should not be enabled
U-0
—
HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER
Detect
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
Control
Advance Information
register
HLVDEN
R/W-0
(1)
U = Unimplemented
‘0’ = Bit is cleared
HLVDL3
R/W-0
The block diagram for the HLVD module is shown in
Figure 22-1.
The module is enabled by setting the HLVDEN bit.
Each time that the HLVD module is enabled, the cir-
cuitry requires some time to stabilize. The IRVST bit is
a read-only bit and is used to indicate when the circuit
is stable. The module can only generate an interrupt
after the circuit is stable and IRVST is set.
The VDIRMAG bit determines the overall operation of
the module. When VDIRMAG is cleared, the module
monitors for drops in V
point. When the bit is set, the module monitors for rises
in V
PIC18F2XK20/4XK20
DD
(1)
above the set point.
HLVDL2
R/W-1
(1)
DD
C = Clearable only bit
x = Bit is unknown
below a predetermined set
HLVDL1
R/W-0
(1)
DS41303B-page 283
HLVDL0
R/W-1
bit 0
(1)