PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 314

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PIC18F23K20-E/MLQTP

Manufacturer Part Number
PIC18F23K20-E/MLQTP
Description
28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F2XK20/4XK20
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS41303B-page 312
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CARRY bit =
REG
W
CARRY bit =
REG
W
Q1
register ‘f’
=
=
=
=
ADD W and CARRY bit to f
ADDWFC
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) + (f) + (C) → dest
N,OV, C, DC, Z
Add W, the CARRY flag and data mem-
ory location ‘f’. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed in data memory location ‘f’.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 24.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
ADDWFC
Read
0010
Q2
1
02h
4Dh
0
02h
50h
00da
REG, 0, 1
f {,d {,a}}
Process
Data
Q3
ffff
destination
Advance Information
Write to
Q4
ffff
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
=
=
Read literal
AND literal with W
ANDLW
0 ≤ k ≤ 255
(W) .AND. k → W
N, Z
The contents of W are AND’ed with the
8-bit literal ‘k’. The result is placed in W.
1
1
ANDLW
0000
Q2
‘k’
A3h
03h
© 2007 Microchip Technology Inc.
k
1011
05Fh
Process
Data
Q3
kkkk
Write to W
Q4
kkkk

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