LAN9118_05 SMSC [SMSC Corporation], LAN9118_05 Datasheet - Page 44

• Manufacturer Part Number: LAN9118_05
• Description: High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.1 (05-17-05)
3.12.1
3.12.2
TX Buffer Format
TX buffers exist in the host’s memory in a given format. The host writes a TX command word into the
TX data buffer before moving the Ethernet packet data. The TX command A and command B are 32-
bit values that are used by the LAN9118 in the handling and processing of the associated Ethernet
packet data buffer. Buffer alignment, segmentation and other packet processing parameters are
included in the command structure. The following diagram illustrates the buffer format.
Note 3.14 Figure 3.13, "TX Buffer Format", shows the TX Buffer as it is written into the LAN9118. It
TX Command Format
The TX command instructs the TX FIFO controller on handling the subsequent buffer. The command
precedes the data to be transmitted. The TX command is divided into two, 32-bit words; TX command
‘A’ and TX command ‘B’.
There is a 16-bit packet tag in the TX command ‘B’ command word. Packet tags may, if host software
desires, be unique for each packet (i.e., an incrementing count). The value of the tag will be returned
in the RX status word for the associated packet. The Packet tag can be used by host software to
uniquely identify each status word as it is returned to the host.
should be noted that not all of the data shown in this diagram is actually stored in the TX
data FIFO. This must be taken into account when calculating the actual TX data FIFO
usage. Please refer to
page 48
for a detailed explanation on calculating the actual TX data FIFO usage.
Host Write
Order
2nd
3rd
Last
1st
Figure 3.13 TX Buffer Format
31
DATASHEET
Offset + Data DWORD0
Optional offset DWORD0
Optional offset DWORDn
Optional Pad DWORDn
Optional Pad DWORD0
Section 3.12.5, "Calculating Actual TX Data FIFO Usage," on
TX Command 'B'
TX Command 'A'
Last Data & PAD
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SMSC LAN9118
Datasheet