LAN9118_05 SMSC [SMSC Corporation], LAN9118_05 Datasheet - Page 68

• Manufacturer Part Number: LAN9118_05
• Description: High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.1 (05-17-05)
5.3.1
BASE ADDRESS
31-16
BITS
15-0
+ OFFSET
B8h - FCh
ACh
9Ch
A0h
A4h
A8h
B0h
B4h
DESCRIPTION
Chip ID. This read-only field identifies this design
Chip Revision. This is the current revision of the chip.
ID_REV—Chip ID and Revision
This register contains the ID and Revision fields for this design.
Offset:
Table 5.1 LAN9118 Direct Address Register Map (continued)
MAC_CSR_DATA
MAC_CSR_CMD
RESERVED
FREE_RUN
E2P_DATA
RX_DROP
E2P_CMD
AFC_CFG
SYMBOL
CONTROL AND STATUS REGISTERS
50h
DATASHEET
Free Run Counter
RX Dropped Frames Counter
MAC CSR Synchronizer Command (MAC
CSR’s are indexed through this register)
MAC CSR Synchronizer Data
Automatic Flow Control Configuration
EEPROM command (The EEPROM is
indexed through this register)
EEPROM Data
Reserved for future use
68
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
REGISTER NAME
Size:
32 bits
TYPE
RO
RO
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
DEFAULT
SMSC LAN9118
DEFAULT
0001h
0118h
-
-
Datasheet