LAN9118_05 SMSC [SMSC Corporation], LAN9118_05 Datasheet - Page 92

• Manufacturer Part Number: LAN9118_05
• Description: High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.1 (05-17-05)
5.4.1
30-24
BITS
31
23
22
INDEX
C
A
B
1
2
3
4
5
6
7
8
9
Receive All Mode (RXALL). When set, all incoming packets will be received and passed on to the
address filtering Function for processing of the selected filtering mode on the received frame. Address
filtering then occurs and is reported in Receive Status. When reset, only frames that pass Destination
Address filtering will be sent to the Application.
Reserved
Disable Receive Own (RCVOWN). When set, the MAC disables the reception of frames when TXEN
is asserted. The MAC blocks the transmitted frame on the receive path. When reset, the MAC receives
all packets the PHY gives, including those transmitted by the MAC.This bit should be reset when the
Full Duplex Mode bit is set.
Reserved
MAC_CR—MAC Control Register
This register establishes the RX and TX operation modes and controls for address filtering and packet
filtering.
Offset:
Default Value:
MII_DATA
SYMBOL
MAC_CR
MII_ACC
WUCSR
ADDRH
ADDRL
HASHH
HASHL
VLAN1
VLAN2
FLOW
WUFF
Table 5.6 LAN9118 MAC CSR Register Map
MAC CONTROL AND STATUS REGISTERS
1
00040000h
MAC Control Register
MAC Address High
MAC Address Low
Multicast Hash Table High
Multicast Hash Table Low
MII Access
MII Data
Flow Control
VLAN1 Tag
VLAN2 Tag
Wake-up Frame Filter
Wake-up Control and Status
DATASHEET
DESCRIPTION
92
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
REGISTER NAME
Attribute:
Size:
R/W
32 bits
FFFFFFFFh
0000FFFFh
00040000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
DEFAULT
SMSC LAN9118
Datasheet