PEB2085 SIEMENS [Siemens Semiconductor Group], PEB2085 Datasheet - Page 219

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PEB2085

Manufacturer Part Number
PEB2085
Description
ISDN SubscribernAccess Controller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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4.2
The following register description is only valid if IOM-1 mode is selected (ADF2:IMS = 0).
For IOM-2 mode refer to chapter 4.3.
4.2.1
Value after reset: 00
Important Note
SPU
SAC
SPM
Semiconductor Group
Software Power Up
Used in TE mode only.
If ADF1:CFS=1, before activating the ISDN S-interface in TE mode the SPU-bit has
to be set to "1" and then cleared again:
After a subsequent CISQ interrupt (C/I code change; ISTA) and reception of the C/I
code "PU" (Power Up indication in TE mode) the reaction of the processor would be:
– to write an Activate Request command as C/I code in the CIXR register.
– to reset the SPU-bit and wait for the following CISQ interrupt.
SIP Port Activation
SIP port is in high impedance state (SAC = 0) or operating (SAC = 1).
Serial Port Timing Mode
Depending on the interface mode, the following timing options are provided.
0: Timing mode 0; SIP (SLD) operates in master mode, SCA supplies the 128-kHz
1: Timing mode 1; SIP (SLD) operates in slave mode, FSD supplies a delayed
7
Special Purpose Registers: IOM
Serial Port Control Register
SPU
data clock signal for port A (SSI).
typical applications: TE, NT modes
frame synchronization signal for the IOM interface, serial port A (SSI) is not
used.
typical applications: LT-T, LT-S modes
After a hardware reset the pins SDAX/SDS1 and SCA/FSD/SDS2 are both
"low" and have the functions of SDS1 and SDS2 in terminal timing mode
(since SPM = 0), respectively, until the SPCR is written to for the first time.
From that moment on, the function taken on by these pins depends on the
state of the IOM Mode Select bit IMS (ADF2 register).
SAC
H
SPM
TLP
®
219
-1 Mode
C1C1
SPCR
C1C0
Read/Write Address 30
C2C1
Register Description
C2C0
0
H

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