PIC18F2682-I/PT MICROCHIP [Microchip Technology], PIC18F2682-I/PT Datasheet - Page 239

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PIC18F2682-I/PT

Manufacturer Part Number
PIC18F2682-I/PT
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
FIGURE 18-4:
FIGURE 18-5:
TABLE 18-5:
© 2007 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
RCSTA
TXREG
TXSTA
BAUDCON
SPBRGH
SPBRG
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note 1:
Note:
(Interrupt Reg. Flag)
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREG
(Transmit Buffer
Name
Reg. Empty Flag)
(Transmit Shift
Write to TXREG
BRG Output
(Shift Clock)
(Transmit Shift
BRG Output
(Shift Clock)
TRMT bit
TXIF bit
This timing diagram shows two consecutive transmissions.
TRMT bit
Reserved in PIC18F2682/2685 devices; always maintain these bits clear.
TXIF bit
(pin)
TX
(pin)
EUSART Transmit Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
ABDOVF
PSPIE
PSPIP
PSPIF
TX
SPEN
CSRC
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
1 T
(1)
(1)
(1)
ASYNCHRONOUS TRANSMISSION
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK)
CY
Word 1
Transmit Shift Reg
Transmit Shift Reg.
Word 1
Word 1
Word 1
RCIDL
ADIE
ADIP
ADIF
Bit 6
RX9
TX9
1 T
Start bit
CY
Start bit
Word 2
SREN
TXEN
RCIF
RCIE
RCIP
Bit 5
1 T
PIC18F2682/2685/4682/4685
CY
bit 0
bit 0
Preliminary
INT0IE
CREN
SYNC
SCKP
Bit 4
TXIF
TXIE
TXIP
bit 1
Word 1
bit 1
Word 1
ADDEN
SENDB
BRG16
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
TMR0IF
CCP1IF
CCP1IE
CCP1IP
BRGH
FERR
Bit 2
bit 7/8
bit 7/8
Word 2
Transmit Shift Reg.
TMR2IF
TMR2IE
TMR2IP
Stop bit
INT0IF
OERR
TRMT
WUE
Bit 1
Stop bit
Start bit
TMR1IE
TMR1IP
TMR1IF
ABDEN
RX9D
DS39761B-page 237
TX9D
RBIF
Bit 0
Word 2
on page
Values
bit 0
Reset
49
52
52
52
51
51
51
51
51
51

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