LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 21

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LPC47N237-MD

Manufacturer Part Number
LPC47N237-MD
Description
3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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3.3v I/O Controller for Port Replicators and Docking Stations
Chapter 6
6.1
6.2
6.3
SMSC DS – LPC47N237
The LPC47N237 has two power planes: VCC and VTR. It contains 24 MHz crystal pins and 24 MHz clock
output.
3.3 Volt Operation / 5 Volt Tolerance
The LPC47N237 is a 3.3 Volt part. It is intended solely for 3.3V applications. Non-LPC bus pins are 5V
tolerant; that is, the input voltage is 5.5V max, and the I/O buffer output pads are backdrive protected.
The LPC interface pins are 3.3 V only. These signals meet PCI DC specifications for 3.3V signaling.
These pins are:
The input voltage for all other pins is 5.5V max. These pins include all non-LPC Bus pins and the following
pins:
VCC Power
The LPC47N237 is a 3.3 Volt part.
Description Section and the Maximum Current Values subsection.
VTR Power
The LPC47N237 requires a trickle supply (V
events in the PME interface when V
Operational Description Section. The maximum VTR current that is required depends on the functions that
are used in the part. See Trickle Power Functionality subsection and the Maximum Current Values
subsection. If the LPC47N237 is not intended to provide wake-up capabilities on standby current, V
be connected to V
Note: If V
minimum potential at least 10 µs before V
powered, the potential difference between the two supplies must not exceed 500mV.
LAD[3:0]
nLFRAME
nLDRQ
nLPCPD
nPCI_RESET
PCI_CLK
SER_IRQ
nCLKRUN
nIO_PME
TR
is to be used for programmable wake-up events when V
Power/Clock Functionality
CC
. The V
TR
pin generates a V
DATASHEET
CC
The VCC supply is 3.3 Volts (nominal).
is removed. The VTR supply is 3.3 Volts (nominal). See the
Page 21
CC
TR
) to provide sleep current for the programmable wake-up
TR
begins a power-on cycle. When V
Power-on-Reset signal to initialize these components.
CC
is removed, V
TR
See the Operational
TR
Revision 0.3 (10-26-04)
and V
must be at its full
CC
are fully
TR
can

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