LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 33

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LPC47N237-MD

Manufacturer Part Number
LPC47N237-MD
Description
3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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3.3v I/O Controller for Port Replicators and Docking Stations
8.1.6
SMSC DS – LPC47N237
MODE
ONLY
BIT 3
FIFO
Line Control Register (LCR)
Address Offset = 3H, DLAB = 0, READ/WRITE
This register contains the format information of the serial line. The bit definitions are:
Bits 0 and 1
These two bits specify the number of bits in each transmitted or received serial character. The encoding of
bits 0 and 1 is as follows:
The Start, Stop and Parity bits are not included in the word length.
Bit 2
This bit specifies the number of stop bits in each transmitted or received serial character. The following
table summarizes the information.
0
0
BIT 2
IDENTIFICATION
0
0
Start
INTERRUPT
REGISTER
BIT 1
1
0
LSB Data 5-8 bits MSB
BIT 0
BIT 1
0
0
0
0
1
1
Third
Fourth
PRIORITY
BIT 0
LEVEL
DATASHEET
0
1
0
1
Figure 8.1 - Serial Data
WORD LENGTH
INTERRUPT SET AND RESET FUNCTIONS
Holding
Register
Empty
MODEM
Status
Transmitter
Page 33
INTERRUPT
5 Bits
6 Bits
7 Bits
8 Bits
TYPE
Parity
Transmitter
Holding Register
Empty
Clear to Send or
Data Set Ready
or Ring Indicator
or Data Carrier
Detect
INTERRUPT
SOURCE
Stop
Reading the IIR
Register (if
Source of
Interrupt) or
Writing the
Transmitter
Holding Register
Reading the
MODEM Status
Register
INTERRUPT
CONTROL
RESET
Revision 0.3 (10-26-04)

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