LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 3

• Manufacturer Part Number: LPC47N237-MD
• Description: 3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
• Manufacturer: SMSC [SMSC Corporation]

3.3v I/O Controller for Port Replicators and Docking Stations
Chapter 1
Chapter 2
Chapter 3
Chapter 4
4.1
4.2
Chapter 5
Chapter 6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
Chapter 7
7.1
7.2
7.3
Chapter 8
8.1
SMSC DS – LPC47N237
6.3.1
7.3.1
7.3.2
7.3.3
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
8.1.7
8.1.8
Buffer Name Description ................................................................................................................... 18
Pins That Require External Resistors ............................................................................................... 19
3.3 Volt Operation / 5 Volt Tolerance ................................................................................................ 21
VCC Power........................................................................................................................................ 21
VTR Power ........................................................................................................................................ 21
24 MHz Crystal.................................................................................................................................. 22
24 MHz Output .................................................................................................................................. 22
Internal PWRGOOD .......................................................................................................................... 22
Maximum Current Values.................................................................................................................. 23
Power Management Events (PME/SCI)............................................................................................ 23
Super I/O Registers........................................................................................................................... 24
Host Processor Communication........................................................................................................ 24
LPC Interface .................................................................................................................................... 24
LPC Cycles........................................................................................................................................................25
Field Definitions .................................................................................................................................................25
nLFRAME Usage ..............................................................................................................................................25
I/O Read and Write Cycles ................................................................................................................................26
DMA Read and Write Cycles.............................................................................................................................26
DMA Protocol ....................................................................................................................................................26
CLOCKRUN Protocol ........................................................................................................................................26
LPCPD Protocol ................................................................................................................................................26
SYNC Protocol ..................................................................................................................................................27
Typical Usage....................................................................................................................................................27
SYNC Timeout ..................................................................................................................................................27
SYNC Patterns and Maximum Number of SYNCS............................................................................................27
SYNC Error Indication .......................................................................................................................................28
I/O and DMA START Fields ..............................................................................................................................28
Reset Policy ......................................................................................................................................................28
Wait State Requirements...................................................................................................................................28
Register Description .......................................................................................................................... 29
Trickle Power Functionality .....................................................................................................................22
LPC Interface Signal Definition ...............................................................................................................25
Power Management................................................................................................................................26
LPC Transfers ........................................................................................................................................28
Receive Buffer Register (RB)..................................................................................................................29
Transmit Buffer Register (TB).................................................................................................................30
Interrupt Enable Register (IER)...............................................................................................................30
FIFO Control Register (FCR) ..................................................................................................................30
Interrupt Identification Register (IIR) .......................................................................................................31
Line Control Register (LCR)....................................................................................................................33
Modem Control Register (MCR) .............................................................................................................34
Line Status Register (LSR) .....................................................................................................................35
General Description ........................................................................................................... 10
Pin Configuration............................................................................................................... 11
Pin Layout........................................................................................................................... 12
Description of Pin Functions ............................................................................................. 13
Block Diagram.................................................................................................................... 20
Power/Clock Functionality................................................................................................ 21
Functional Description....................................................................................................... 24
Serial Port (UART) ............................................................................................................ 29
TABLE OF CONTENTS
DATASHEET
Page 3
Revision 0.3 (10-26-04)