LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 96

• Manufacturer Part Number: LPC47N237-MD
• Description: 3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
• Manufacturer: SMSC [SMSC Corporation]

Note 17.4
17.4.3 CR02
Note:
17.4.4 CR03
Revision 0.3 (10-26-04)
CR02 can only be accessed in the configuration state and after the CSR has been initialized to 02H.
This register is reserved, read only, and returns 0 when read.
BIT NO.
BIT NO.
Power Down bits disable the respective logical device and associated pins, however the power down bit
does not disable the selected address range for the logical device. To disable the host address registers
the logical device’s base address must be set below 100h. Devices that are powered down but still
reside at a valid I/O base address will participate in Plug-and-Play range checking.
Power Down bits disable the respective logical device and associated pins, however the power down bit
does not disable the selected address range for the logical device. To disable the host address registers
the logical device’s base address must be set below 100h. Devices that are powered down but still
reside at a valid I/O base address will participate in Plug-and-Play range checking.
0-2
4-7
0,1
5,6
2
3
4
7
3
Reserved
Parallel Port
Power
Parallel Port
Mode
Reserved
Reserved
Lock CRx
Reserved
UART Power
Down
Reserved
Type: R/W
Type: R/W
BIT NAME
BIT NAME
(Note 17.4)
Read Only. A read returns “0”.
A high level on this bit, supplies power to the Parallel Port
(Default). A low level on this bit puts the Parallel Port in low power
mode.
Parallel Port Mode. A high level on this bit, sets the Parallel Port
for Printer Mode (Default). A low level on this bit enables the
Extended Parallel port modes. Refer to Bits 0 and 1 of CR4
Read Only. A read returns “1”.
Read Only. A read returns “0”.
A high level on this bit enables the reading and writing of CR00 –
CR39 (Default). A low level on this bit disables the reading and
writing of CR00 – CR39. Note: once the Lock CRx bit is set to “0”,
this bit can only be set to “1” by a hard reset or power-up reset.
Read Only. A read returns “0”.
A high level on this bit, allows normal operation of the Primary
Serial Port (Default). A low level on this bit places the Primary
Serial Port into Power Down Mode.
Read Only. A read returns “0”.
DATASHEET
PP Power/Mode/CR Lock
Table 17.4 – CR01
Table 17.5 – CR02
UART Power
Page 96
DESCRIPTION
DESCRIPTION
3.3v I/O Controller for Port Replicators and Docking Stations
Default: 0x9C on VCC POR;
Default: 0x08 on VCC POR;
Bit[7] = 1 on HARD RESET
Bit[7] = 0 on HARD RESET
SMSC DS – LPC47N237