MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 359

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MC68HC912D60A

Manufacturer Part Number
MC68HC912D60A
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
ATD0CTL0/ATD1CTL0 — Reserved
ATD0CTL1/ATD1CTL1 — Reserved
ATD0CTL2/ATD1CTL2 — ATD Control Register 2
18.9.1 ATD Control Registers 0 &1 (ATDCTL0, ATDCTL1)
18.9.2 ATD Control Registers 2 & 3 (ATDCTL2, ATDCTL3)
MC68HC912D60A — Rev 3.0
MOTOROLA
RESET:
RESET:
RESET:
ADPU
Bit 7
Bit 7
Bit 7
0
0
0
AFFC
6
0
6
0
6
0
Writes to this register will abort current conversion sequence.
Read or write any time.
WRITE: Write to this register has no meaning.
READ: Special Mode only.
The ATD control registers 2 & 3 are used to select the power up mode,
fast flag clear mode, wait mode, 16 channel mode, interrupt control, and
freeze control. Writes to these registers will not abort the current
conversion sequence nor start a new sequence.
READ: any time
WRITE: any time
(except for Bit 0 – ASCIF, READ: any time, WRITE: not allowed)
ADPU — ATD Disable / Power Down
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Disable and power down the ATD
1 = Normal ATD functionality
ASWAI
5
0
5
0
5
0
Analog-to-Digital Converter
Go to: www.freescale.com
DJM
4
0
4
0
4
0
Reserved
3
0
3
0
3
0
Reserved
2
0
2
0
2
0
ASCIE
1
0
1
0
1
0
Analog-to-Digital Converter
ASCIF
Bit 0
Bit 0
Bit 0
0
0
0
Technical Data
ATD Registers
$0060/$01E0
$0061/$01E1
$0062/$01E2
359

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