MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 90
MC68HC912D60A
Manufacturer Part Number
MC68HC912D60A
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912D60A.pdf
(460 pages)
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Bus Control and Input/Output
PEAR — Port E Assignment Register
Technical Data
90
RESET:
RESET:
RESET:
RESET:
RESET:
NDBE
BIT 7
0
0
1
1
0
CGMTE
6
0
0
1
0
0
PE[1:0] are associated with XIRQ and IRQ and cannot be configured as
outputs. These pins can be read regardless of whether the alternate
interrupt functions are enabled.
This register is not in the map in peripheral mode and expanded modes
while the EME control bit is set.
Read and write anytime.
The PEAR register is used to choose between the general-purpose I/O
functions and the alternate bus control functions of port E. When an
alternate control function is selected, the associated DDRE bits are
overridden.
The reset condition of this register depends on the mode of operation
because bus-control signals are needed immediately after reset in some
modes.
In normal single-chip mode, no external bus control signals are needed
so all of port E is configured for general-purpose I/O.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
PIPOE
5
0
1
0
0
1
Bus Control and Input/Output
Go to: www.freescale.com
NECLK
4
0
0
1
1
0
LSTRE
3
0
1
0
0
1
RDWE
2
0
1
0
0
1
CALE
MC68HC912D60A — Rev 3.0
1
0
0
0
0
0
DBENE
BIT 0
0
0
0
0
0
MOTOROLA
single chip
single chip
Expanded
Expanded
Peripheral
Special
Special
Normal
Normal
$000A
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