MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 440

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MC68HC912D60A

Manufacturer Part Number
MC68HC912D60A
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Appendix: Changes from MC68HC912D60
22.2.4 WAIT mode
22.2.5 KWU Filter
22.2.6 Port ADx
22.2.7 ATD
22.2.7.1 Channel Selection
22.2.7.2 CD bit
Technical Data
440
This new version will correctly exit WAIT mode using short XIRQ or IRQ
inputs.
The KWU filter will now ignore pulses shorter than 2 microseconds.
Power must be applied to VDDA at all times even if the ADC is not being
used. This is necessary for port AD0 and port AD1 to function correctly
as digital inputs. This is also valid for MC68HC912D60.
Any channel can be selected for the first conversion of a multiple channel
conversion. Bits CA, CB & CC in ATDxCTL5 do not get masked but are
used to select which channel is used to start the sequential conversion
sequence. For compatibilty, ensure that the appropriate bits are
cleared in the software. See
Bit CD in ATDxCTL5 is renamed SC to differentiate it from extended
functionality of bits CA, CB & CC. Functionality is unchanged as it still
selects conversion from the internal reference sources but when doing a
multiple channel scan, bits CA, CB & CC must be cleared as appropriate
for compatible reference selection.
Freescale Semiconductor, Inc.
For More Information On This Product,
Appendix: Changes from MC68HC912D60
Go to: www.freescale.com
Table
18-8.
MC68HC912D60A — Rev 3.0
MOTOROLA

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