HD64F3670 RENESAS [Renesas Technology Corp], HD64F3670 Datasheet - Page 171

• Manufacturer Part Number: HD64F3670
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

11.5.6
If a general register (GRA, GRB, GRC, or GRD) is used as an output compare register, the
corresponding IMFA, IMFB, IMFC, or IMFD flag is set to 1 when TCNT matches the general
register.
The compare match signal is generated in the last state in which the values match (when TCNT is
updated from the matching count to the next count). Therefore, when TCNT matches a general
register, the compare match signal is generated only after the next TCNT clock pulse is input.
Figure 11.21 shows the timing of the IMFA to IMFD flag setting at compare match.
Timing of IMFA to IMFD Flag Setting at Compare Match
Figure 11.21 Timing of IMFA to IMFD Flag Setting at Compare Match
TCNT input
clock
TCNT
GRA to GRD
Compare
match signal
IMFA to IMFD
IRRTW
Input capture
signal
TCNT
GRA, GRB
GRC, GRD
Figure 11.20 Buffer Operation Timing (Input Capture)
N
N
M
N
N
M
N+1
N+1
Rev. 2.0, 03/02, page 147 of 298
N+1
N