HD64F3670 RENESAS [Renesas Technology Corp], HD64F3670 Datasheet - Page 24

• Manufacturer Part Number: HD64F3670
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 Timer V
Table 10.1 Pin Configuration.................................................................................................112
Table 10.2 Clock Signals to Input to TCNTV and Counting Conditions.................................. 115
Section 11 Timer W
Table 11.1
Table 11.2
Section 13 Serial Communication Interface3 (SCI3)
Table 13.1
Table 13.2
Table 13.2
Table 13.2
Table 13.3
Table 13.4
Table 13.5
Table 13.6
Section 14 A/D Converter
Table 14.1 Pin Configuration.................................................................................................197
Table 14.2 Analog Input Channels and Corresponding ADDR Registers ................................ 198
Table 14.3 A/D Conversion Time (Single Mode) ................................................................... 203
Section 17 Electrical Characteristics
Table 17.1 Absolute Maximum Ratings ................................................................................. 219
Table 17.2 DC Characteristics (1) .......................................................................................... 221
Table 17.2 DC Characteristics (2) .......................................................................................... 225
Table 17.3 AC Characteristics ............................................................................................... 226
Table 17.4 Serial Interface (SCI3) Timing ............................................................................. 228
Table 17.5 A/D Converter Characteristics .............................................................................. 229
Table 17.6 Watchdog Timer Characteristics........................................................................... 230
Table 17.7 Flash Memory Characteristics (Preliminary) ......................................................... 231
Appendix A Instruction Set
Table A.1 Instruction Set ....................................................................................................... 239
Table A.2 Operation Code Map (1)........................................................................................ 252
Table A.2 Operation Code Map (2)........................................................................................ 253
Table A.2 Operation Code Map (3)........................................................................................ 254
Table A.3 Number of Cycles in Each Instruction.................................................................... 256
Table A.4 Number of Cycles in Each Instruction.................................................................... 257
Table A.5 Combinations of Instructions and Addressing Modes ............................................. 266
Rev. 2.0, 03/02, page xxii of xxii
Timer W Functions........................................................................................... 126
Pin Configuration ............................................................................................. 127
Pin Configuration ............................................................................................. 157
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1)...... 165
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2)...... 166
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (3)...... 167
Maximum Bit Rate for Each Frequency (Asynchronous Mode) ......................... 167
BRR Settings for Various Bit Rates (Clocked Synchronous Mode).................... 168
SSR Status Flags and Receive Data Handling.................................................... 174
SCI3 Interrupt Requests.................................................................................... 191