NAND04G-B2D NUMONYX [Numonyx B.V], NAND04G-B2D Datasheet - Page 31

• Manufacturer Part Number: NAND04G-B2D
• Description: 4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash memories
• Manufacturer: NUMONYX [Numonyx B.V]

NAND04G-B2D, NAND08G-BxC
Figure 17. Multiplane copy back program
1. The 81h setup code is also accepted for backward compatibility.
6.7
Figure 18. Block erase
RB
I/O
Read
Code
00h
RB
I/O
Add Inputs
Source
A18=0
Figure 17
Block erase
Erase operations are done one block at a time. An erase operation sets all of the bits in the
addressed block to ‘1’. All previous data in the block is lost.
An erase operation consists of the following three steps (refer to
1.
2.
3.
The operation is initiated on the rising edge of Write Enable, W, after the Confirm command
is issued. The P/E/R Controller handles block erase and implements the verify process.
During the block erase operation, only the Read Status Register and Reset commands are
accepted; all other commands are ignored.
Once the program operation has completed, the P/E/R Controller bit SR6 is set to ‘1’ and
the Ready/Busy signal goes High. If the operation completed successfully, the Write Status
bit SR0 is ‘0’, otherwise it is set to ‘1’.
(Read Busy time)
Block Erase
Setup Code
tBLBH1
One bus cycle is required to set up the Block Erase command. Only addresses A18-
A29 are used; all other address inputs are ignored.
Three bus cycles are then required to load the address of the block to be erased. Refer
to
One bus cycle is required to issue the Block Erase Confirm command to start the P/E/R
Controller.
35h
60h
Table 8: Address definition (x8 devices)
Busy
provides a description of multiplane copy back program waveform.
Read
Code
00h
Add Inputs
Block Address
Source
A18 = 1
(Read Busy time)
Inputs
tBLBH1
35h
Busy
Copy Back
Code
85h
Confirm
Code
D0h
Add Inputs
A18 = 0
Target
for the block addresses of each device.
tIPBSY
(Erase Busy time)
11h
tBLBH3
Busy
Busy
Copy Back
85h
Code
(1)
Figure 18: Block
Add Inputs
Target
A18 = 1
Read Status Register
(Program Busy time)
70h
Device operations
tBLBH2
Read Status Register
10h
SR0
Busy
erase):
70h
ai07593
ai13172b
31/69
SR0