NAND04G-B2D NUMONYX [Numonyx B.V], NAND04G-B2D Datasheet - Page 41

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NAND04G-B2D

Manufacturer Part Number
NAND04G-B2D
Description
4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash memories
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
NAND04G-B2D, NAND08G-BxC
Table 21.
103-104
105-106
108-109
115-127
96-99
Byte
100
101
102
107
110
111
112
113
114
128
Parameter page data structure (continued)
O/M
M
M
M
M
M
M
M
M
M
M
M
M
M
O
(1)
Bit 4 to bit 7
Bit 0 to bit 3
Bit 5 to bit 7
4
Bit 1 to bit 3
0
Bit 4 to bit 7
Bit 0 to bit 3
Bit 4 to bit 7
Bit 3
Bit 2
Bit 1
Bit 0
Number of blocks per logical unit (LUN)
Number of logical units (LUNs)
Column address cycles
Row address cycles
Number of bits per cell
Bad blocks maximum per LUN
Block endurance
Guaranteed valid blocks at beginning of target
Block endurance for guaranteed valid blocks
Number of programs per page
Reserved
1 = partial page layout is partial page data followed by
partial page spare
Reserved
1 = partial page programming has constraints
Number of bits ECC correctability
Reserved (0)
Number of interleaved address bits
Reserved (0)
Address restrictions for program cache
1 = program cache supported
1 = no block address restrictions
Overlapped/concurrent interleaving support
Reserved (0)
I/O pin capacitance
Number of interleaved address bits
Interleaved operation attributes
Partial programming attributes
Number of address cycles
Description
Device operations
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