AT90USB1286-16MU ATMEL [ATMEL Corporation], AT90USB1286-16MU Datasheet - Page 265
![no-image](/images/no-image-200.jpg)
AT90USB1286-16MU
Manufacturer Part Number
AT90USB1286-16MU
Description
Microcontroller with 64/128K Bytes of ISP Flash and USB Controller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT90USB1286-16MU.pdf
(434 pages)
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7593A–AVR–02/06
DPADD10:8 is the most significant part of DPADD. The least significant part is provided by the
UDPADDL register.
• 7-0 – DPADD7:0: DPRAM Address Low Bit
DAPDD7:0 is the least significant part of DPADD. The most significant part is provided by the
UDPADDH register.
• 7-6 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 5 – HNPREQ: HNP Request Bit
Set to initiate the HNP when the controller is in the Device mode (B). Set to accept the HNP
when the controller is in the Host mode (A).
Clear otherwise.
• 4 – SRPREQ: SRP Request Bit
Set to initiate the SRP when the controller is in Device mode. Cleared by hardware when the
controller is initiating a SRP.
• 3 – SRPSEL: SRP Selection Bit
Set to choose VBUS pulsing as SRP method.
Clear to choose data line pulsing as SRP method.
• 2 – VBUSHWC: VBus Hardware Control Bit
Set to disable the hardware control over the UVCON pin.
Clear to enable the hardware control over the UVCON pin.
See for more details
• 1 – VBUSREQ: VBUS Request Bit
Set to assert the UVCON pin in order to enable the VBUS power supply generation. This bit
shall be used when the controller is in the Host mode.
Cleared by hardware when VBUSRQC is set.
• 0 – VBUSRQC: VBUS Request Clear Bit
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R
7
0
-
7
0
R
6
0
-
HNPREQ
6
0
R/W
5
0
SRPREQ
5
0
R/W
4
0
4
0
SRPSEL
DPADD7:0
R/W
3
0
3
0
VBUSHWC
R/W
2
0
2
0
VBUSREQ
R/W
1
0
AT90USB64/128
1
0
VBUSRQC
R/W
0
0
0
0
UDPADDL
OTGCON
265
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