AT90USB1286-16MU ATMEL [ATMEL Corporation], AT90USB1286-16MU Datasheet - Page 291

• Manufacturer Part Number: AT90USB1286-16MU
• Description: Microcontroller with 64/128K Bytes of ISP Flash and USB Controller
• Manufacturer: ATMEL [ATMEL Corporation]

7593A–AVR–02/06
Clear to disable an endpoint interrupt (EPINTx) when TXINI is sent.
• 7-0 - DAT7:0 -Data Bits
Set by the software to read/write a byte from/to the endpoint FIFO selected by EPNUM.
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2-0 - BYCT10:8 - Byte count (high) Bits
Set by hardware. This field is the MSB of the byte count of the FIFO endpoint. The LSB part is
provided by the UEBCLX register.
• 7-0 - BYCT7:0 - Byte Count (low) Bits
Set by the hardware. BYCT10:0 is:
- (for IN endpoint) increased after each writing into the endpoint and decremented after each
byte sent,
- (for OUT endpoint) increased after each byte sent by the host, and decremented after each
byte read by the software.
• 7 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 6-0 - EPINT6:0 - Endpoint Interrupts Bits
Set by hardware when an interrupt is triggered by the UEINTX register and if the corresponding
endpoint interrupt enable bit is set.
Bit
Read/Write
Initial Value
Bit
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Read/Write
-
BYCT D7
DAT D7
R/W
R
7
0
7
0
-
R
7
R
7
0
0
EPINT D6
-
BYCT D6
DAT D6
R/W
R
6
0
R
6
0
6
0
R
6
0
-
EPINT D5
DAT D5
BYCT D5
R/W
R
5
0
5
0
R
5
0
R
5
0
-
EPINT D4
DAT D4
BYCT D4
R/W
R
4
0
4
0
R
4
0
R
4
0
-
EPINT D3
DAT D3
BYCT D3
R/W
R
3
0
3
0
R
3
0
R
3
0
BYCT D10 BYCT D9
DAT D2
EPINT D2
BYCT D2
R/W
R
2
0
2
0
AT90USB64/128
R
R
2
0
2
0
DAT D1
EPINT D1
BYCT D1
R/W
R
1
0
1
0
R
R
1
0
1
0
BYCT D8
DAT D0
EPINT D0 UEINT
BYCT D0 UEBCLX
R/W
R
0
0
0
0
R
R
0
0
0
0
UEBCHX
UEDATX
291