MC908JL16CFAE FREESCALE [Freescale Semiconductor, Inc], MC908JL16CFAE Datasheet - Page 162

• Manufacturer Part Number: MC908JL16CFAE
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Computer Operating Properly (COP)
The COP counter is a free-running 6-bit counter preceded by the 12-bit system integration module (SIM)
counter. If not cleared by software, the COP counter overflows and generates an asynchronous reset after
2
configuration register 1. Writing any value to location $FFFF before an overflow occurs prevents a COP
reset by clearing the COP counter and stages 12 through 5 of the SIM counter.
A COP reset pulls the RST pin low for 32 × ICLK cycles and sets the COP bit in the reset status register
(RSR). (See
13.3 I/O Signals
The following paragraphs describe the signals shown in
13.3.1 ICLK
ICLK is the internal oscillator output signal, typically 50-kHz. The ICLK frequency varies depending on the
supply voltage. See
13.3.2 COPCTL Write
Writing any value to the COP control register (COPCTL) (see
counter and clears bits 12 through 5 of the SIM counter. Reading the COP control register returns the low
byte of the reset vector.
13.3.3 Power-On Reset
The power-on reset (POR) circuit in the SIM clears the SIM counter 4096 × ICLK cycles after power-up.
13.3.4 Internal Reset
An internal reset clears the SIM counter and the COP counter.
13.3.5 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data bus. A reset vector fetch clears
the SIM counter.
13.3.6 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the configuration register 1
(CONFIG1). (See
162
18
– 2
4
or 2
13
4.7.2 Reset Status Register
– 2
Service the COP immediately after reset and before entering or after exiting
stop mode to guarantee the maximum time before the first COP counter
overflow.
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from
generating a reset even while the main program is not working properly.
4
Chapter 3 Configuration and Mask Option Registers (CONFIG and
ICLK cycles; depending on the state of the COP rate select bit, COPRS, in
Chapter 17 Electrical Specifications
MC68HC908JL16 Data Sheet, Rev. 1.1
(RSR).).
NOTE
NOTE
Figure
for ICLK parameters.
13.4 COP Control
13-1.
Register) clears the COP
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