MC908JL16CFAE FREESCALE [Freescale Semiconductor, Inc], MC908JL16CFAE Datasheet - Page 42

• Manufacturer Part Number: MC908JL16CFAE
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Configuration and Mask Option Registers (CONFIG and MOR)
3.2 Functional Description
The configuration registers are used in the initialization of various options. The configuration registers can
be written once after each reset. All of the configuration register bits are cleared during reset. Since the
various options affect the operation of the MCU, it is recommended that these registers be written
immediately after reset. The configuration registers are located at $001E and $001F. The configuration
registers may be read at anytime.
The mask option register (MOR) is used to select the oscillator option for the MCU: crystal oscillator or
RC oscillator. The MOR is implemented as a byte in FLASH memory. Hence, writing to the MOR requires
programming the byte.
3.3 Configuration Register 1 (CONFIG1)
COPRS — COP Rate Select Bit
LVID — Low Voltage Inhibit Disable Bit
SSREC — Short Stop Recovery Bit
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COPRS selects the COP time-out period. Reset clears COPRS. (See
Properly
LVID disables the LVI module. Reset clears LVID. (See
SSREC enables the CPU to exit stop mode with a delay of 32 ICLK cycles instead of a 4096 ICLK cycle
delay.
1 = COP timeout period is (2
0 = COP timeout period is (2
1 = Low voltage inhibit disabled
0 = Low voltage inhibit enabled
1 = Stop mode recovery after 32 ICLK cycles
0 = Stop mode recovery after 4096 ICLK cycles
(COP).)
Address: $001F
The options except LVIT[1:0] are one-time writable by the user after each
reset. The LVIT[1:0] bits are one-time writable by the user only after each
POR (power-on reset). The CONFIG registers are not in the FLASH
memory but are special registers containing one-time writable latches after
each reset. Upon a reset, the CONFIG registers default to predetermined
settings as shown in
Exiting stop mode by pulling reset will result in the long stop recovery. If
using an external crystal, do not set the SSREC bit.
Reset:
Read:
Write:
COPRS
Bit 7
R
0
Figure 3-2. Configuration Register 1 (CONFIG1)
= Reserved
R
6
0
13
18
MC68HC908JL16 Data Sheet, Rev. 1.1
Figure 3-2
– 2
– 2
4
4
) ICLK cycles
) ICLK cycles
R
5
0
and
NOTE
NOTE
LVID
Figure 3-3.
4
0
Chapter 14 Low-Voltage Inhibit
R
3
0
SSREC
2
0
Chapter 13 Computer Operating
STOP
1
0
Freescale Semiconductor
COPD
Bit 0
0
(LVI).)