MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 187

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MC9S12E32CFU

Manufacturer Part Number
MC9S12E32CFU
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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4.4.6
The RTI can be used to generate a hardware interrupt at a fixed periodic rate. If enabled (by setting
RTIE=1), this interrupt will occur at the rate selected by the RTICTL register. The RTI runs with a gated
OSCCLK (see
RTIF flag is set to 1 and a new RTI time-out period starts immediately.
A write to the RTICTL register restarts the RTI time-out period.
If the PRE bit is set, the RTI will continue to run in pseudo-stop mode.
4.4.7
4.4.7.1
The CRGV4 block behaves as described within this specification in all normal modes.
4.4.7.2
The VCO has a minimum operating frequency, f
to a failure or due to long crystal start-up time, the bus clock and the core clock are derived from the VCO
Freescale Semiconductor
Real-Time Interrupt (RTI)
Modes of Operation
Normal Mode
Self-Clock Mode
Section Figure 4-22., “Clock Chain for
gating condition
OSCCLK
= Clock Gate
STOP(PSTP,PRE),
WAIT(RTIWAI),
RTI enable
Figure 4-22. Clock Chain for RTI
MC9S12E128 Data Sheet, Rev. 1.07
2
2
2
2
2
2
SCM
1024
.
. If the external clock frequency is not available due
RTR[6:4]
0:1:0
0:0:1
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
RTI”). At the end of the RTI time-out period the
COUNTER (RTR[3:0])
4-BIT MODULUS
Chapter 4 Clocks and Reset Generator (CRGV4)
RTI TIMEOUT
187

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