MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 429
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MC9S12E32CFU
Manufacturer Part Number
MC9S12E32CFU
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12E32CFU.pdf
(606 pages)
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13.3.2.12 Main Timer Interrupt Flag 1 (TFLG1)
Read: Anytime
Write: Used in the clearing mechanism (set bits cause corresponding bits to be cleared). Writing a zero
will not affect current status of the bit.
Freescale Semiconductor
C[7:4]F
Reset
Field
7:4
W
R
Input Capture/Output Compare Channel “x” Flag — These flags are set when an input capture or output
compare event occurs. Clear a channel flag by writing one to it.
When TFFCA bit in TSCR register is set, a read from an input capture or a write into an output compare channel
(0x0010–0x001F) will cause the corresponding channel flag CxF to be cleared.
C7F
0
7
The newly selected prescale factor will not take effect until the next
synchronized edge where all prescale counter stages equal zero.
C6F
0
6
Figure 13-18. Main Timer Interrupt Flag 1 (TFLG1)
PR2
0
0
0
0
1
1
1
1
Table 13-15. TRLG1 Field Descriptions
Table 13-14. Timer Clock Selection
C5F
MC9S12E128 Data Sheet, Rev. 1.07
0
5
PR1
0
0
1
1
0
0
1
1
C4F
NOTE
0
4
PR0
Description
0
1
0
1
0
1
0
1
0
0
3
Bus Clock / 128
Bus Clock / 16
Bus Clock / 32
Bus Clock / 64
Bus Clock / 1
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Timer Clock
Chapter 13 Timer Module (TIM16B4CV1)
0
0
2
0
0
1
0
0
0
429
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