M52S64322A-10BG ESMT [Elite Semiconductor Memory Technology Inc.], M52S64322A-10BG Datasheet - Page 19
![no-image](/images/no-image-200.jpg)
M52S64322A-10BG
Manufacturer Part Number
M52S64322A-10BG
Description
512K x 32 Bit x 4 Banks Mobile Synchronous DRAM
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet
1.M52S64322A-10BG.pdf
(47 pages)
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3. CAS Interrupt (I)
Elite Semiconductor Memory Technology Inc.
*Note:
D Q ( CL 2 )
DQ ( C L 3 )
1 ) R e a d i n t e r r u p t e d b y R e a d ( B L = 4 )
2 ) W r i t e i n t e r r u p t e d b y W r i t e ( B L = 2 )
CL K
C M D
C M D
A D D
A D D
C L K
D Q
1. By “interrupt” is meant to stop burst read/write by external before the end of burst.
2. t
3. t
By ” CAS interrupt ”, to stop burst read/write by CAS access; read and write.
CCD
CDL
: Last data in to new column address delay. (=1CLK)
: CAS to CAS delay. (=1CLK)
DA 0
W R
R D
A
A
t
* N o t e 2
t
t
* N o t e 3
C C D
C C D * N o t e 2
C D L
D B 0
W R
RD
B
B
Q A 0
DB 1
* N o t e 1
Q B 0
Q A 0
Q B 0
Q B 1
Q B 2
Q B 1
Q B 3
Q B 2
Q B 3
D Q ( CL 2 )
DQ ( C L 3 )
3 ) W r i t e i n t e r r u p t e d b y R e a d ( B L = 2 )
W R
D A 0
D A 0
A
t
t
* N o t e 3
C C D * N o t e 2
C D L
RD
B
Publication Date: Aug. 2009
Revision: 1.3
M52S64322A
DB 0
D B 0
D B 1
D B 1
19/47
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