XC68HC05P18A Motorola, XC68HC05P18A Datasheet - Page 19
XC68HC05P18A
Manufacturer Part Number
XC68HC05P18A
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet
1.XC68HC05P18A.pdf
(130 pages)
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1.4 Mask Options
1.5 Functional Pin Description
MC68HC05P18A
MOTOROLA
NOTE:
The MC68HC05P18A has eight mask options:
This subsection describes the functionality of each pin on the
MC68HC05P18A package.
For pins connected to subsystems described in other sections, a
reference to the section is given instead of a detailed functional
description.
The pinout is shown in
1. IRQ is edge- and level-sensitive or edge-sensitive only.
2. SIOP MSB (most-significant bit) first or LSB (least-significant bit)
3. SIOP clock rate set to OSC divided by 2, 4, 8, 16, 32, 64, 128, or
4. COP watchdog timer enabled or disabled
5. Stop instruction enabled or converted to halt mode
6. Option to enable clock output pin to replace PD5
7. Option to individually enable pullups/interrupts on each of the
8. LVR enabled or disabled
first
256
eight port A pins
General Description
Figure
1-2.
General Description
Technical Data
Mask Options
19
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