XC68HC05P18A Motorola, XC68HC05P18A Datasheet - Page 59
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XC68HC05P18A
Manufacturer Part Number
XC68HC05P18A
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet
1.XC68HC05P18A.pdf
(130 pages)
- Current page: 59 of 130
- Download datasheet (2Mb)
7.6 Port D
MC68HC05P18A
MOTOROLA
INTERNAL HC05
DATA BUS
WRITE $0007
WRITE $0003
READ $0007
READ $0003
Port D is a 2-bit port with:
Pin PD7 is shared with the 16-bit timer. There is a mask option to have
PD5 replaced with the clock output. The port D data register is located
at address $0003 and its data direction register (DDR) is located at
address $0007. Reset does not affect the data registers, but clears the
DDRs, thereby setting PD5/CKOUT to input mode. Writing a 1 to DDR
bit 5 sets PD5/CKOUT to output mode (see
Port D may be used for general I/O applications regardless of the state
of the 16-bit timer. Since PD7 is an input-only line, its state can be read
from the port D data register at any time.
RESET
(RST)
•
•
One bidirectional pin, PD5/CKOUT
One input-only pin, PD7
Figure 7-4. Port D I/O Circuitry
DATA DIRECTION
REGISTER BIT
REGISTER BIT
DATA
Input/Output (I/O) Ports
Figure
OUTPUT
7-4).
Input/Output (I/O) Ports
Technical Data
PIN
I/O
Port D
59
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