M37221 Mitsubishi, M37221 Datasheet - Page 11

• Manufacturer Part Number: M37221
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER
• Manufacturer: Mitsubishi

INTERRUPTS
Interrupts can be caused by 14 different sources consisting of 4 ex-
ternal, 8 internal, 1 software, and reset. Interrupts are vectored inter-
rupts with priorities shown in Table 1. Reset is also included in the
table because its operation is similar to an interrupt.
When an interrupt is accepted,
(1) The contents of the program counter and processor status
(2) The interrupt disable flag I is set to “1” and the corresponding
(3) The jump destination address stored in the vector address enters
Other interrupts are disabled when the interrupt disable flag is set to
“1.”
All interrupts except the BRK instruction interrupt have an interrupt
request bit and an interrupt enable bit. The interrupt request bits are
in interrupt request registers 1 and 2 and the interrupt enable bits are
in interrupt control registers 1 and 2. Figure 7 shows the structure of
the interrupt-related registers.
Interrupts other than the BRK instruction interrupt and reset are ac-
cepted when the interrupt enable bit is “1,” interrupt request bit is “1,”
and the interrupt disable flag is “0.” The interrupt request bit can be
set to “0” by a program, but not set to “1.” The interrupt enable bit can
be set to “0” and “1” by a program.
Reset is treated as a non-maskable interrupt with the highest priority.
Figure 6 shows interrupt control.
Table 1. Interrupt vector addresses and priority
Reset
CRT interrupt
INT2 interrupt
INT1 interrupt
Timer 4 interrupt
f(X
V
Timer 3 interrupt
Timer 2 interrupt
Timer 1 interrupt
Serial I/O interrupt
Multi-master I
INT3 interrupt
BRK instruction interrupt
SYNC
register are automatically stored into the stack.
interrupt request bit is set to “0.”
the program counter.
IN
)/4096 interrupt
interrupt
2
Interrupt source
C-BUS interface interrupt
Priority
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Vector addresses
FFFD
FFED
FFEB
FFDF
FFFB
FFEF
FFFF
FFE9
FFE7
FFE5
FFF9
FFF5
FFF3
FFF1
M37221EF-XXXSP,M37221EFSP
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Interrupt Causes
(1) V
(2) INT1, INT2, INT3 interrupts
(3) Timer 1, 2, 3 and 4 interrupts
(4) Serial I/O interrupt
, FFFE
, FFFC
, FFFA
, FFF8
, FFF4
, FFF2
, FFF0
, FFEE
, FFEC
, FFEA
, FFE8
, FFE6
, FFE4
, FFDE
The V
the vertical sync signal.
The CRT interrupt occurs after character block display to the CRT
is completed.
With an external interrupt input, the system detects that the level
of a pin changes from “L” to “H” or from “H” to “L,” and generates
an interrupt request. The input active edge can be selected by
bits 3, 4 and 5 of the interrupt input polarity register (address
00F9
tected; when it is “1,” a change from “H” to “L” is detected. Note
that all bits are cleared to “0” at reset.
An interrupt is generated by an overflow of timer 1, 2, 3 or 4.
This is an interrupt request from the clock synchronous serial
I/O function.
SYNC
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
SYNC
and CRT interrupts
) : when this bit is “0,” a change from “L” to “H” is de-
with ON-SCREEN DISPLAY CONTROLLER
interrupt is an interrupt request synchronized with
Non-maskable
Active edge selectable
Active edge selectable
Active edge selectable
Active edge selectable
Non-maskable (software interrupt)
Remarks
11