M37221 Mitsubishi, M37221 Datasheet - Page 20

• Manufacturer Part Number: M37221
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER
• Manufacturer: Mitsubishi

MULTI-MASTER I
The multi-master I
tions conformed with the Philips I
interface, having an arbitration lost detection function and a synchro-
nous function, is useful for serial communications of the multi-mas-
ter.
Figure 14 shows a block diagram of the multi-master I
face and Table 2 shows multi-master I
This multi-master I
ister, the I
control register, the I
Fig. 14. Block diagram of multimaster I
20
Serial
data
(SDA)
Serial
clock
(SCL)
2
C data shift register, the I
Noise
elimination
circuit
Noise
elimination
circuit
2
2
C-BUS interface is a circuit for serial communica-
C-BUS interface consists of the I
2
C status register and other control circuits.
2
C-BUS INTERFACE
Clock
control
circuit
Data
control
circuit
2
C-BUS data transfer format. This
2
AL
circuit
BB
circuit
C clock control register, the I
2
C-BUS interface functions.
2
C-BUS interface
S0D
I
2
b7
C clock control register
SAD6 SAD5 SAD4 SAD3 SAD2 SAD1 SAD0 RBW
ACK
S2
b7
S0
b7
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
ACK
2
BIT
C address reg-
2
I
2
C-BUS inter-
I
Address comparator
C data shift register
2
MODE
FAST
C address register
CCR4 CCR3 CCR2 CCR1 CCR0
2
Clock division
C
Internal data bus
M37221EF-XXXSP,M37221EFSP
Table 2. Multi-master I
Note: We are not responsible for any third party’s infringement of
Communication mode
SCL clock frequency
: System clock = f(X
patent rights or other rights attributable to the use of the con-
trol function (bits 6 and 7 of the I
00DA
ports (SCL1, SCL2, SDA1, SDA2).
b0
b0
Format
b0
Item
System clock ( )
16
) for connections between the I
with ON-SCREEN DISPLAY CONTROLLER
S1D I
BSEL1 BSEL0
MST TRX BB PIN
b7
S1
b7
2
IN
C-BUS interface functions
)/2
In conformity with Philips I
standard:
In conformity with Philips I
standard:
16.1 kHz to 400 kHz (at
10-bit addressing format
7-bit addressing format
High-speed clock mode
Standard clock mode
Master transmission
Master reception
Slave transmission
Slave reception
2
Interrupt
generating
circuit
C control register
10BIT
SAD
ALS ESO BC2 BC1 BC0
2
C control register at address
AL AAS AD0 LRB
Function
I
register
Interrupt
request signal
(IICIRQ)
2
C status
2
Bit counter
C-BUS interface and
= 4 MHz)
2
2
C-BUS
C-BUS
b0
b0