GS8662S08E GSI [GSI Technology], GS8662S08E Datasheet - Page 9

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GS8662S08E

Manufacturer Part Number
GS8662S08E
Description
72Mb Burst of 2 DDR SigmaSIO-II SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
Special Functions
Byte Write and Nybble Write Control
Byte Write Enable pins are sampled at the same time that Data In is sampled. A high on the Byte Write Enable pin associated with
a particular byte (e.g., BW0 controls D0–D8 inputs) will inhibit the storage of that particular byte, leaving whatever data may be
stored at the current address at that byte location undisturbed. Any or all of the Byte Write Enable pins may be driven high or low
during the data in sample times in a write sequence.
Each write enable command and write address loaded into the RAM provides the base address for a 2 beat data transfer. The x18
version of the RAM, for example, may write 36 bits in association with each address loaded. Any 9-bit byte may be masked in any
write sequence.
Nybble Write (4-bit) control is implemented on the 8-bit-wide version of the device. For the x8 version of the device, “Nybble
Write Enable” and “NWx” may be substituted in all the discussion above.
Example x18 RAM Write Sequence using Byte Write Enables
Resulting Write Operation
Output Register Control
SigmaSIO-II SRAMs offer two mechanisms for controlling the output data registers. Typically, control is handled by the Output
Register Clock inputs, C and C. The Output Register Clock inputs can be used to make small phase adjustments in the firing of the
output registers by allowing the user to delay driving data out as much as a few nanoseconds beyond the next rising edges of the K
and K clocks. If the C and C clock inputs are tied high, the RAM reverts to K and K control of the outputs.
Rev: 1.01 9/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Data In Sample
D0–D8
Written
Beat 1
Beat 2
Time
Beat 1
Unchanged
D9–D17
BW0
0
1
Unchanged
D0–D8
BW1
1
0
Beat 2
D9–D17
Written
9/37
Don’t Care
D0–D8
Data In
GS8662S08/09/18/36E-333/300/250/200/167
Don’t Care
D9–D17
Data In
© 2005, GSI Technology
Preliminary

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